At STAC (Securities Technology Analysis Center) London, there’s a lot for FinTech geeks to love. There is something for every-geek here: speakers enthusing about the latest Knights Landing Intel offering; presentations on code snippets for non-linear aggregation in Spark; and exhibition booths featured the latest and sexiest in FinTech , mobbed by visitors cooing over network cards or aggregations taps.
At the Corvil booth, we attract a mix of friends and curious tech-heads keen to understand a little more about what Corvil does. As a long-standing tech enthusiast myself, it’s refreshing to have discussions on the merits of a particular aggregation switch or the viability of a PTP distribution across the WAN. Tech lovers love to validate ideas amongst their peers and share their latest achievements in latency and throughput with the greater community.
There are often recurring themes at STAC conferences, with content focusing on latency and throughput on everything from NoSQL databases to Spark resource managers and Network I/O at 25 and 40 Ghz. While many of the themes are consistent, there’s always something new to learn. An intriguing paper on PTP Security introduced me to the notion of the ‘hostile PTP clock’ — apparently it can compromise a host clock, forcing it back in time and thereby weakening its security certification strengths. Who knew?
STAC doesn’t focus solely on tech, however. There was just the odd lone voice that spoke up for real world objectives from a business point of view. This almost alien perspective intruded upon proceedings with phrases like “Ease of deployment” or the need for “Application SLAs”. It’s easy to forget that without the software to exploit this wonderful new hardware, businesses will continue to invest in the next big thing and be disappointed with the lack of return on their spending. At Corvil, we always aim to give businesses transparent visibility into how critical applications perform across all of their infrastructure.
The topic of Moore’s Law came up during one panel discussion, noting how it’s entering old age and slowing down. Old Moore now faces a future horizon where silicon fabrication limits meet the dimensions of the atom. It is well beyond the time where we should look to the hardware specs for the next great leap in performance. The gains that everyone at STAC seeks are now less driven by silicon and more driven by high quality software analytics.